// transmit and receive (working)


#include <16F628.h>
#device adc=8
#use delay(clock=4000000)
#fuses  PUT, XT, NOMCLR, NOWDT, NOLVP, NOBROWNOUT
#use rs232(baud=9600,parity=N,xmit=PIN_B2,rcv=PIN_B1,bits=8)

// ---------------------
// Port B
// ---------------------
//#define TRW_CLK2     PIN_B0   //
#define TRW_CLK1     PIN_B5	//
#define TRW_CS 		PIN_B7	//
#define TRW_CE       PIN_B3	//
//#define TRW_DOUT2		PIN_B4	//
#define TRW_DATA 		PIN_B4	//
#define TRW_DR1 		PIN_B6	//
//#define TRW_DR2 		PIN_B7	//
// 0-out 1-in  0b76543210
#define B_TRIS 0b11110000

inline initPorts() {
	port_b_pullups(FALSE);
	disable_interrupts(INT_RB);
//   SET_TRIS_A( A_TRIS );
//	SET_TRIS_B( B_TRIS );
//	SET_TRIS_C( C_TRIS );
}

// ========================================================================
// Timing
//
#define XTAL 4000000
#define IPS (XTAL/4)
// Master tick clock is 8bit with no prescaler
//> 20kHz , 50us <//
#define RTCC_SETUPFLAGS (RTCC_DIV_1 | RTCC_8_BIT | RTCC_INTERNAL)
#define RTCC_TICKS_PER_MS (IPS / 256 / 1000)

// ========================================================================
// TRW interface
//
// - 16 bit address
// -  8 bit payload
// - 16 bit crc
//
//byte 14 set to # bits in data payload
//#define DATA2_W 224
#define DATA2_W 48  // original
//#define DATA2_W 16
//byte 13 set to # bits in data payload
//#define DATA1_W 224
#define DATA1_W 48  //  original
//#define DATA1_W 16

//byte 12-8 40 bit address
#define ADDR2_4 0x00
#define ADDR2_3 0x00
#define ADDR2_2 0x00
#define ADDR2_1 0x42
#define ADDR2_0 0x42

//byte 7-3  40 bit address
#define ADDR1_4 0x00
#define ADDR1_3 0x00
#define ADDR1_2 0x00
#define ADDR1_1 0x42
#define ADDR1_0 0x42

//byte 2    bit 7-2 # address bits
//          bit 1   0-8bit 1-16bit crc size
//          bit 0   1-Enable CRC
//                   0b76543210
#define ADDR_W       0b01000000
#define CRC_L        0b00000010
#define CRC_EN       0b00000001
//#define CRC_EN       0b00000000  //  I turned crc off for testing purposes


//byte 1    bit 7   1-Enable dual channel
//          bit 6   1-Enable shockburst
//          bit 5   1-Enable 1mb/s
//          bit 4-2 Crystal freq   011-16MHz
//          bit 1-0 Power: 11-max power
//                   0b76543210
#define RX2_EN       0b10000000
#define CM           0b01000000

#define RFDR_SB    0b00100000
//#define RFDR_SB      0b00000000  // disable 1mb/s

#define XO_F         0b00001100
//#define RF_PWR       0b00000000  //  -20db
//#define RF_PWR       0b00000001  //  -10db (what Ron was using)
//#define RF_PWR       0b00000010  //  -5db
#define RF_PWR       0b00000011  //  0db (full power)

//byte 0    bit 7-1 Channel 0b11111000 seems to be max
//          bit 0   1-Rx Enable
//                   0b76543210
#define RF_CH        0b11110110  //  F6,246,    2,424,600,000 Hz
#define RXEN         0b00000001



// ========================================================================
//
// INTERRUPTS
//
int8 time50us = 0;
int1 tMs = 0;
int1 t50us = 0;
#int_RTCC
RTCC_isr() {
	// RTCC setup for 20kHz  // See Timing section
   t50us = !t50us;
   time50us++;
   if(time50us >= RTCC_TICKS_PER_MS) {
      time50us = 0;
      tMs = !tMs;
   }
}


#define BUF_MAX 6
byte buf[BUF_MAX];
#define CLKDELAY()
//delay_us(5)
#define CSDELAY()
//delay_us(10)
#define PWUPDELAY() delay_us(999)


void putByte( byte b ) {  //msb bit first
   int8 i;
   int8 p = 7;
   for(i=0 ; i < 8 ; i++) {
      output_low(TRW_CLK1);
      if( bit_test(b,p--) ) {
         output_high(TRW_DATA);
      }else{
         output_low(TRW_DATA);
      }
      CLKDELAY();
      output_high(TRW_CLK1);  // clock out on rising edge
      CLKDELAY();
   }
}

byte getByte() {  //msb bit first
   int8 i , b = 0;
   int8 p = 7;
   for(i=0 ; i < 8 ; i++) {
      output_low(TRW_CLK1);
      CLKDELAY();
      output_high(TRW_CLK1);
      CLKDELAY();           // read before falling edge
      if( input(TRW_DATA) ) {
         bit_set(b,p--);
      }else{
         bit_clear(b,p--);
      }
   }
   return b;
}


void trwConfig() {
   output_low(TRW_CE); output_low(TRW_CS);
   output_low(TRW_CLK1); output_low(TRW_DATA);
   PWUPDELAY();
   output_high(TRW_CS);
   CSDELAY();

   //msb byte first
   putByte(DATA2_W);
   putByte(DATA1_W);
   putByte(ADDR2_4);
   putByte(ADDR2_3);
   putByte(ADDR2_2);
   putByte(ADDR2_1);
   putByte(ADDR2_0);
   putByte(ADDR1_4);
   putByte(ADDR1_3);
   putByte(ADDR1_2);
   putByte(ADDR1_1);
   putByte(ADDR1_0);
   putByte(ADDR_W | CRC_L | CRC_EN);
   putByte(RX2_EN | CM | RFDR_SB | XO_F | RF_PWR);
   putByte(RF_CH | RXEN);
   //lsb byte last

   output_float(TRW_DATA);
   output_low(TRW_CE); output_low(TRW_CS);
   output_low(TRW_CLK1);

}

void trwSetTxByte() {
   output_low(TRW_CE);
   output_high(TRW_CS);
   CSDELAY();
   putByte(RF_CH);
   output_low(TRW_CS);
   output_low(TRW_CLK1);
}

void trwSetTx() {
   output_low(TRW_CE); //output_low(PIN_C0);
   output_high(TRW_CS);
   CSDELAY();
      output_low(TRW_DATA);
      output_high(TRW_CLK1);
      CLKDELAY();
      output_low(TRW_CLK1);
      CLKDELAY();
   output_low(TRW_CS);
   output_low(TRW_CLK1);
}

void trwSetRxByte() {
   output_low(TRW_CE);
   output_high(TRW_CS);
   CSDELAY();
   putByte(RF_CH | RXEN);
   output_low(TRW_CS);
   output_float(TRW_DATA);
   output_low(TRW_CLK1);
   output_high(TRW_CE);
}

void trwSetRx() {
   output_low(TRW_CE); //output_low(PIN_C0);
   output_high(TRW_CS);
   CSDELAY();
      output_high(TRW_DATA);
      output_high(TRW_CLK1);
      CLKDELAY();
      output_low(TRW_CLK1);
      CLKDELAY();
   output_low(TRW_CS);
   output_float(TRW_DATA);
   output_low(TRW_CLK1);
   output_high(TRW_CE); //output_high(PIN_C0);

}


void putBuf() {
   int8 i;
   output_high(TRW_CE); //output_high(PIN_C0);
   CSDELAY();

   putByte(ADDR1_1); putByte(ADDR1_0);

   for( i=0; i<BUF_MAX ; i++) {
      putByte(buf[i]);
   }
   output_low(TRW_CE); //output_low(PIN_C0);
   output_low(TRW_CLK1);
}

void getBuf() {
   int8 i;
   //output_low(TRW_CE); output_low(PIN_C0);
   for( i=0; i<BUF_MAX ; i++) {
       buf[i] = getByte();
   }
   output_low(TRW_CLK1);
   output_high(TRW_CE); //output_high(PIN_C0);
}

// ========================================================================
//
// MAIN
//

int8  n=0, x, z;

void main() {

   trwConfig();
   printf( "transmit and receive test\r\n" );
   trwSetRx();       // switch to receive
   delay_ms(1);
   buf[0] = 'A';
   buf[1] = 'B'; //  not used
   buf[2] = 'C'; //  not used
   buf[3] = 'D'; //  not used
   buf[4] = 'E'; //  not used
   buf[5] = 'F'; //  not used

   // Loop forever
   while(1) {
      if(input(TRW_DR1)){
         getBuf();         // get packet (buf)
         putc(buf[0]);     //
      }

      if(kbhit()){
         trwSetTx();       // switch to transmit
         delay_ms(1);
         buf[0] = getchar();
         putBuf();         // send packet (buf)
         delay_ms(1);      // won't go back to recieve without this
         trwSetRx();       // switch back to receive
         delay_ms(1);
      }

   } //while

} //main